1. President, Board of Directors at Martinson Child Development Center, Santa Clara, CA from 1996 to 2024 This is a non-profit child development center providing quality child development services for children from 2 to 5 years.
2. Senior Principal Hardware Engineer at Symantec / Veritas Technologies, Mountain View, CA from 2012 to 2017 Developing storage appliances for NetBackup and other applications. Qualification testing of servers and storage appliances.
3. Senior Hardware Design Engineer at Data Domain, Palo Alto, CA from 2002 to 2007 Responsible for hardware platform definition, design, and implementation for three generations of Data Domain backup and recovery storage appliance with data deduplication. Developed hardware platform architecture based on server-class motherboards, SATA HDDs, SAS expander backplanes, and PCI/PCI-e cards including NICs, NVRAM, and SAS HDD controllers.
Responsible for product quality monitoring, reporting, root cause analysis, and resolution of defects. Implemented processes for product life cycle, including component qualification and verification, system manufacturing, testing, and QC. Created and implemented manufacturing processes, test procedures, and diagnostics for CM (contract manufacturer). Implemented and maintained Arena PLM system, including BOMs, ECOs, CM and supplier collaboration, and compliance evidence for RoHS and WEEE. Secured regulatory agency approvals for emissions (FCC Part 15, EN 55022, VCCI), susceptibility (EN 55024), safety (UL 1950, CE, CSA, EN 60950) and environmental (RoHS, WEEE).
4. Senior Hardware Design Engineer at ONStor / Agile Storage, Campbell, CA from 2001 to 2002 Provided interface and support functions between management and engineering in development of a SAN (Storage Area Network) controller providing Gigabit Ethernet and 2Gbit Fiber Channel connectivity. Drove product alignment, debugging, and performance enhancement with HW, SW and QA. Performed design verification, debugging, signal quality analysis, ECO's, integration of new features, and securing regulatory agency approvals. Managed development of custom power supply, from product specification to acceptance testing.
5. Principle Hardware Design Engineer at Alidian Networks, San Jose, CA from 1999 to 2001 Implemented new Metropolitan-Area Network architecture based on Packet-Over-SONET and OC-48c (2.5Gbit) over DWDM (Dense Wave Division Multiplexing) fiber optics. Coordinated both control and data-plane design efforts across the hardware engineering team and heavily influenced architecture and key features. Coordinated the hardware, software and test engineering groups to achieve aggressive time to market goals and telco-level system reliability. Drove product development across software engineering and manufacturing. Designed hot-swap backplane for DWDM fabric switch and for network daughter cards. Developed packet-forwarding micro-code for Network Processor IC.
6. Engineering Manager at Alantec / FORE Systems, San Jose, CA from 1993 to1999 Managed HW engineering team developing boards and ASIC's for the PowerHub line of Ethernet switching products and for various multi-protocol network switches and routers supporting 10/100 Ethernet, FDDI and ATM. Coordinated certification efforts for EMI and international safety standards. Member of the design team for three generations of high-performance Ethernet switching ASICs.
7. Senior Hardware Engineer at Stanford University from 1980 to 1984 Developed and deployed Massbus Ethernet Interface System (MEIS) to connect Stanford's DEC computers to campus Ethernet. Stanford licensed the MEIS to Cisco Systems as their first product. Also designed and deployed related Ethernet boards for Stanford’s first computer networks.
